OpenCL™ is a standard for writing parallel programs for heterogeneous systems, much like the NVidia* CUDA* programming language. In the FPGA environment, OpenCL constructs are synthesized into custom logic. An overview of the OpenCL standards will be discussed. You will learn about the platform, execution, memory, and programming models that define the OpenCL specification. Syntax of the OpenCL language will be discussed, and you will see examples of OpenCL usage. The similarities and differences between OpenCL and CUDA will be highlighted throughout. The advantages of using the Intel® FPGA OpenCL solution will be presented.*OpenCL and the OpenCL logo are trademarks of Apple Inc. used by permission of Khronos*Other names and brands may be claimed as the property of others
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Introduction to OpenCL on FPGAs
IntelAbout this Course
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Beginner Level
Approx. 16 hours to complete
English
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Shareable Certificate
Earn a Certificate upon completion
100% online
Start instantly and learn at your own schedule.
Beginner Level
Approx. 16 hours to complete
English
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Syllabus - What you will learn from this course
1 hour to complete
Heterogeneous Parallel Computing
1 hour to complete
3 videos (Total 11 min)
4 hours to complete
OpenCL for Platform and Host-side Software
4 hours to complete
3 videos (Total 14 min)
4 hours to complete
Executing OpenCL Kernels
4 hours to complete
4 videos (Total 22 min)
4 hours to complete
NDRange Kernels
4 hours to complete
3 videos (Total 31 min)
Reviews
- 5 stars50%
- 4 stars21.69%
- 3 stars14.15%
- 2 stars8.49%
- 1 star5.66%
TOP REVIEWS FROM INTRODUCTION TO OPENCL ON FPGAS
by MRApr 26, 2020
This course was really helpful! Looking forward to more courses from Intel.
by SBMay 6, 2020
Needed more detailed videos with one example on quartus, and else everything is fine
by MSJan 8, 2022
I appreciate this course for those are wanted to learn FPGA
by SSAug 7, 2021
I wish it had more hardware perspective because for RTL designers it difficult to visualise software being autoconverted into hardware. Performance comparisons with Verilog would have been helpful.
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